A semiconductor device can have a gate insulator film formed in a trench (hereinafter referred to as a trench MOS semiconductor device). To form the trench MOS semiconductor device, after forming a trench on a semiconductor substrate, a gate insulator film is subsequently formed in the trench. FIG. 1 is a plan view showing an arrangement of a principal part of a trench MOS semiconductor device during its manufacture according to a related method developed by the present inventor. FIGS. 2A to 2E are cross sectional views taken along line II-II of FIG. 1, showing arrangements in successive steps of manufacturing the trench MOS semiconductor device. FIG. 2E corresponds to the view of FIG. 1.
In FIG. 1 and FIG. 2E, in each of trenches 4, a gate electrode 8 of polysilicon is formed on a gate oxide film 7 provided on a surface of the trench 4. The gate electrode 8 extends from an end of the trench 4 over a thick oxide film 9. On the gate electrode 8 provided over the thick oxide film 9, an interlayer insulator film (not shown) is formed. In the interlayer insulator film, a contact hole (not shown) is formed to connect the gate electrode 8 to a metal wiring (not shown).
In the related method, on a surface of an n-type silicon semiconductor substrate 1 provided with an n+-drain 11, the thick oxide layer 9 is first formed. Thereafter, a p-type well region 2 is formed in a surface layer of the semiconductor substrate 1. On the surface of the well region 2, a mask 3 is formed with a silicon dioxide film having a desired pattern. The silicon semiconductor substrate 1 in an opening of the mask 3 is etched to form the trench 4 on the silicon semiconductor substrate 1. At this time, an SiO2 side wall protective film 5 is formed on a side wall of the trench 4 (FIG. 2A). The side wall protective film 5 is then removed using an HF etchant. At this time, the mask 3 is set back from an edge of the trench 4 to widen the opening of the mask 3 (FIG. 2B). Thereafter, damages in the trench 4 are removed by isotropic etching. At this time, side walls 41 and 42 of the trench 4 are planarized and the bottom corners 43 and 44 of the trench are rounded (FIG. 2C). Subsequently, for the purpose of rounding corners at an upper part of the trench 4 and removing foreign materials, a sacrifice oxide film 6 is formed by thermal oxidation (FIG. 2D). By removing the sacrifice oxide film 6, the corners at the upper part of the trench 4 are rounded and the foreign materials in the trench 4 are removed. After this, the gate oxide film 7 is formed, and the trench 4 is filled with the gate electrode 8 of polycrystalline silicon, which is etched back with a region extending into the thick oxide film 9 (FIG. 2E). Then, by forming a source and associated regions, a trench MOS semiconductor device is formed.
In the above-explained related manufacturing method, however, for rounding the corners in the trench 4, the sacrifice oxide film 6 must be formed thick. Moreover, the isotropic etching, carried out after the side wall protective film 5 is removed, enlarges the width of the trench 4. The width of the trench 4 can vary depending on variation in an amount of set back of the mask 3 caused when the side wall protective film 5 is removed. This is unfavorable as it degrades the alignment accuracy of the mask to be used in the later step, and prevents micro fabrication.
In view of this problem, the present inventor devised a method by which, after a side wall protective film formed on a side wall of a trench is removed, annealing the trench in an atmosphere of hydrogen before a gate insulator film is formed to thereby round the corner of the trench, while planarizing the side wall of the trench without enlarging the width of the trench. A similar method is also described in JP-A-2002-231945. Such manufacturing methods, however, have disadvantages in that hydrogen handling is much troublesome and a heat treatment apparatus is expensive.
Furthermore, JP-A-2002-231945 also describes that, at the annealing processing under the atmosphere of hydrogen, the mask 3 for forming the trench 4 is set back similarly as shown in FIG. 2A for controlling a radius of curvature of an upper corner of the trench 4 by an amount of the set back.
In controlling the radius of curvature of the corner by setting back the mask 3, although the annealing treatment in the atmosphere of hydrogen performs planarization of the trench side walls 141 and 142 and rounding of the trench corners 143, 144, 145, and 146, diffusion of silicon atoms is restricted by the mask 3 at a boundary of the end of the mask 3 and an exposed portion of the semiconductor substrate 1, forming protrusions 10 (FIG. 3C). Thus formed protrusions 10, in the case of forming the gate electrode 8 on the gate oxide film 7 causes possible dielectric breakdowns at the protrusions 10.
Thus, in the arrangement where an electrode is buried in a trench with an insulator film put between the electrode and the trench, and the electrode is taken out onto a semiconductor substrate for connecting to metal wiring, there is a possibility of dielectric breakdown.
Accordingly, there is a need for a method of manufacturing a semiconductor device with high reproducibility, a semiconductor device having a highly reliable gate insulator film, capable of easily and inexpensively carrying out planarization processing of a gate insulator film forming region before forming a gate insulator film, and planarizing the trench side wall and rounding the trench corners. The present invention addresses this need.